A Field-Programmable Gate Array (FPGA) is a logic chip that is configured by the customer after manufacturing—hence "field-programmable".
1
vote
0answers
44 views
Developing for an FPGA using Impulse C
I am considering using Impulse C to write C code that will compile down to HDL for my FPGA. I'm curious as to what experiences people have had with Impulse C, to better understand the advantages and ...
2
votes
1answer
90 views
My design is not meeting timing. What can I do?
I am using the Altera Quartus II software to compile Verilog for a Cyclone IV FPGA. In my case, the FPGA is fixed; I cannot get a faster one.
Now one isolated module in my design, which deals with ...
3
votes
0answers
62 views
Simulating a simple test bench with a synthesized ROM core
I'm completely new to the world of FPGA's and thought I'd start with a very simple project: a 4-bit 7-segment decoder. The first version I wrote purely in VHDL (it's basically a single combinatorial ...
1
vote
1answer
21 views
Interfacing 3.3V Flex 6000 FPGA to a 5V CMOS DSP (Multivolt IO Question)
I'm going to interface a 5V CMOS DSP to the 3.3V Flex 6000 FPGA.
This FPGA supports 3.3V and 5V IO according to the below figure from the datasheet:
Since the FPGA I found in stock is the 3.3V ...
1
vote
2answers
162 views
Good FPGA / Micorcontroler development board for real time image processing
I have been working with OpenCV on Desktop environment for the past one year and now I want to shift to dedicated hardware for my real time image processing applications. I have the following ...
1
vote
0answers
42 views
Q1113 Ir sensor verilog and Fpga board,how to program?
I have been working with s one of the line IR sensor from sparkfun(Q113). It has 3 port a vcc, ground and signal. As I know one way to find if the object is black or white is through reflection of ...
1
vote
0answers
33 views
Calculating delay caused by the voltage translator chip GTL2000/NVT2000
I want to interface a 5V DSP to a 3.3V FPGA so I need to use voltage/Logic translators for the data, address and control buses.
I found this translator: GTL2000 , It's available in a 22-bit package ...
3
votes
1answer
83 views
Writing a VHDL Module
I am trying to get through this section of a course: http://hamsterworks.co.nz/mediawiki/index.php/Module_9
I am trying to write the 30 bit counter module (Project 9.1 on the page). I have the ...
3
votes
4answers
156 views
How to measure phase difference of two signals of the same frequency in an FPGA?
How to measure phase difference of two signals of the same frequency in an FPGA?
For instance, say I have two 150 MHz signals (internal to the FPGA) that are synchronous to each other, but they are ...
2
votes
2answers
46 views
Measuring Power from Altera Dev. Kit (CycloneIII)
The Altera CycloneIII starter kit that I have provides a jumper (J6) that is connected to VCCINT of the CycloneIII FPGA core for what seems to be the purpose of measuring the core's power consumption. ...
1
vote
1answer
60 views
What is the I/O standard for the PCIe data lines?
I am entering the pin information of my FPGA design using the Altera Quartus II PinPlanner. One of the components of my design is PCIe, and I am having troubles understanding the "I/O standard" ...
4
votes
2answers
126 views
Quartus II: Customise compiler messages
I am working with the Altera Quartus II compiler for my Cyclone IV. I am not happy with what is considered Info, Warning, Error, etc.
For example, inferred latches are Info, but I want them as ...
5
votes
2answers
87 views
Specify exact pin locations on FPGA
I have an Altera Cyclone IV FPGA, and I use the Quartus II software as the compiler.
In the "PinPlanner" it is possible to specify groups of pins (e.g. data buses). For each group, an I/O bank and an ...
8
votes
1answer
259 views
FPGA programming, where to begin
I'm a software developer (C, C++, objective-c, java ...) and I am interested in learning to program FPGAs. Now the question may appear simple to you but please do take time to help me on this one as ...
0
votes
1answer
45 views
Can I use LPDDR with Cyclone III FPGA?
I have seen the Cyclone III datasheet and it claims DDR and DDR2 compatible PHY.
But was looking some good LPDDR chips for my design.
Could I use the PHY inside of Cyclone III with LPDDR ic?
Do you ...
