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Right now, I am taking a course on Verilog HDL, however, our instructor gave us a machine problem wherein we are required to implement a program using verilog while having C# as our main gui. The machine problem given to us is a type of game, called "Beatmania" (like the actual game beatmania from japan). Its gameplay consist of notes falling down from top of the screen, and as it reaches the bar from below the screen, the player must press the corresponding button to "hit" it and a score will be recorded for each hit.

Here is a sample screenshot:

beatmania

But, in our machine problem, the number of buttons is decreased to only 4.

Here are our thoughts so far:

  • Two primary modules will be used, one called ShiftReg and another HitMiss.
  • We will use 4 Shift Registers (one per column) to replicate the gameplay's falling down of notes. ShiftReg module will have this.
  • The pattern will probably be stored in a memory declaration, about 120 bits wide. This is also contained in ShiftReg module.
  • A 1 will represent a bar and a 0 blank.
  • A square waveform or clock will be used to control the speed of the game.
  • As a note reaches the bottom, an AND gate will be used, one input from the serial output of the shift register and another input for the switch. This creates the "hit" of the gameplay. This will be included in the HitMiss module.

  • We thought of using a text file to interface between Verilog and C#. For interfacing the process in verilog to C#'s gui, ShiftReg module will create a textfile like this:

    10110101
    10010101
    01010110
    01010110

    Each line will represent a column in C#, then every time a shifting occurs, the textfile is updated in verilog, and is reflected to the GUI in C#. Thus, causing rapid opening and closing of text files in both Verilog and C#.

  • The ShiftReg module also outputs the shift register's serial output to be input in the HitMiss module.

  • As the HitMiss module accepts the output from the ShiftReg module, the comparison will occur (by use of AND gates as stated above).
  • The HitMiss Module will also contain the calculations for the scoring, such as number of hits, and final grade. Again this will be placed in a text file, to be reflected in C#.
  • Therefore, as of now, for the two modules, the ShiftReg module will have four output ports(serial output of the shift registers), and the HitMiss module will have 8 input ports(to accept inputs from buttons(4), and inputs from ShiftReg module(4)). Start buttons and reset buttons will also be included and text files will be used to bridge Verilog and C#.

Now, here are my questions:

  1. How do I run both programs simultaneously (Verilog and C#), if the game is in real time such as using the clock signal, or interactive button presses? I only know that Verilog is usually simulated through test benches, with a set of user-defined stimulus.
  2. Regards to the design, how am I going to reflect a Hit or a Miss in C#? Any ideas? Also, ideas on how to reflect the buttons from C# to the buttons/input (probably in HitMiss module) in Verilog?
  3. About the storage of pattern, how do I access each bit consecutively for the shift registers to use? Do I use looping?

By the way, I am using Xilinx ISE Project Navigator.

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Is it allowed to use a small microprocessor inside the FPGA (e.g. Microblaze or Picoblaze)? If so, you can use those to make the bridge between the Verilog part of the game running at the FPGA and the C# part of the game running at a PC. A simple UART could be the connection between the two. Making a part of the solution in C at a processor is faster in design time then doing it all in plain RTL. – vermaete Feb 20 at 7:14
About the speeds of the game: use one clock and use different clock enables (CE) have some parts at different speed. Making multiple clocks will make your design much more complicated. – vermaete Feb 20 at 7:41
The thing is, I don't have much knowledge on using microprocessors since the course that I'm taking is software sided only. I googled Microblaze and Picoblaze and read that they're soft processors, are they somewhat emulators of microprocessors? If the microprocessors you're talking about is a piece of hardware, then I'm afraid that we are not allowed to use that. So, is there any way to run verilog code in real time? Yes, I guess we can use different CE for the speed, the problem is, real time simulation. – Julien Nicolas Feb 20 at 12:13
@Julien Nicolas You can't actually do good real-time simulation on a PC, if that's what you're asking. Do you have an FPGA board on which you could run the configuration? – AndrejaKo Feb 20 at 18:09
We can't use any FPGA board on our course, since it only tackles about the software side of verilog hdl. Also, no knowledge yet on it. You only said, "good real time simulation", there must still be a way to do real time simulation even if it's slower. And if that is so, we could maybe just adjust the verilog code to adapt to that kind of speed. – Julien Nicolas Feb 21 at 7:23

1 Answer

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What a weird task! You miss out on a huge amount of the real-world stuff you need to know if you only run the Verilog in simulation!

Anyway:

How do I run both programs simultaneously (Verilog and C#), if the game is in real time such as using the clock signal, or interactive button presses? I only know that Verilog is usually simulated through test benches, with a set of user-defined stimulus.

"Real time" and "Verilog" simulation don't go together - you'll have to synthesise it to some FPGA to get it to go real-time. As you are not "allowed" to do that, your best bet might be to use the Verilog Procedural Interface to communicate with your GUI. You can pass information both ways and remain in sync with each-other.

Regards to the design, how am I going to reflect a Hit or a Miss in C#? Any ideas? Also, ideas on how to reflect the buttons from C# to the buttons/input (probably in HitMiss module) in Verilog?

Use the VPI interface to set and read signals.

About the storage of pattern, how do I access each bit consecutively for the shift registers to use? Do I use looping?

Does this help: http://stackoverflow.com/questions/3517752/basic-verilog-question-shift-register

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