Computer architecture refers to both the design of a computer's external interfaces (instruction sets) and a computer's internal implementation (microarchitecture). The goal of these design decisions is to optimize speed, power efficiency, size, or cost while satisfying constraints on the rest.
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How does the Store Word(SW) and Load Word(LW) instructions work, MIPS
The SW and LW instructions are defined as:
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1answer
80 views
Seeing how Instructions get Translated (Computer Architecture) [closed]
Little bit of a confusing question, also an x-post (Since it may be more suited here than SO). But anyways Im really looking for learning some low level programming. Thing is, Dev boards like ...
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2answers
54 views
What is the reason of RAM modules conflicts in terms of computer architecture?
What is the reason of such conflicts?
I read a book "Computer architecture" by Andrew Tanenbaum, but didn't understand the reasons may cause conflicts with memory with different timings, frequencies.
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1answer
45 views
How to best understand cache associativity?
AFAIK this definition is the most clear and physical:
Associativity number = Number of comparators.
Is it correct? Could you make a more precise / better definition?
The wikipedia illustration is ...
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0answers
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Small space between Cooler and GPU - how to secure components [migrated]
I'm curious about how to secure my desktop computer setup.
I recently bought an Thermalright Macho CPU Cooler and a Gigabyte 7870 OC Windforce.
...
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1answer
86 views
Writing a method using MIPS code
I am trying to understand how convert C code to MIPS code and I have having trouble understanding why the stack pointer( $sp ) needs to be manipulated before and after the procedural code.Isn't the ...
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1answer
224 views
How can a CPU dynamically change its clock frequency?
My Intel CPU changes clock speed depending on the usage, but how does it decide what clock speed to run at? Is the clock speed determined by the OS software using an algorithm, or is it hardware ...
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3answers
109 views
What does it mean for a CPU to support a stack?
How can a CPU not support a stack? Doesn't any architecture that uses subroutines (I'm pretty sure that's all architectures) have to push the return address onto the stack so it can return to where it ...
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6answers
1k views
Why is open hardware so rare? [closed]
I'm trying to understand why open hardware is so much harder to come by than software. I've tried looking around online and I couldn't find as satisfactory explanation.
I understand that hardware is ...
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1answer
66 views
Processor - L1 Data cache interface
Sorry if the following looks like a very specialized (or programming) question, but I'm hoping there are people on this forum who have done VHDL/Verilog modeling, and might be able to answer:
I'm ...
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3answers
411 views
How does the Harvard architecture help?
I was reading about arduino and the AVR architecture and got stuck at the point that how does pipeline stall or bubbling is solved by Harvard architecture introduction in the AVR.I mean what Harvard ...
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1answer
116 views
Electrical Engineering vs Computer Engineering? [closed]
I am trying to decide whether to major in EE or CE. To my knowledge, computer engineering has the same core focus as electrical engineering but with an emphasis on digital logic and microprocessors. ...
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1answer
240 views
Using CCM (Core Coupled Memory) in STM32F4xx
STM32F4xx microcontrollers have 128KB of SRAM + 64KB of CCM SRAM. CMM SRAM is hardwired to data bus so it is impossible to use it with DMA.
What is the reason to add additional SRAM as CCM?
Does it ...
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1answer
138 views
How to calculate index and tag fields lengths for a cpu cache?
I study computer engeering notes for a cache memory and I try to understand what determines the length of the index and the tag fields. The first examples is for 64 bits and the second example is for ...
3
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1answer
221 views
What is CLK in UART/USART used for?
I'm studying computer architecture at my university and I've been recently asked a question: what is CLK used for in UART/USART? The first obvious thing is that it is used for dividing frequency when ...
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2answers
132 views
Verilog asynchronous reads of regs - and design question
I'm trying to understand what the following bit of behavioral code, what kind of hardware it turns into:
...
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2answers
100 views
What determines the number of bits for the address field in a cache memory?
I understand a cache memory is constructed for a basic block like this
Valid bit | Address bits | Data/Instruction
But what determines the length of the address bits? I understand that for a 32-bit ...
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1answer
87 views
Running the linux kernel and ubuntu on a custom processor [closed]
This is hardly a theoretical question as many have done this, albeit there's very little information on the underlying processes.
I'm developing a custom MIPS-based processor on which I would like ...
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1answer
154 views
Processor design: turning blocks on/off dynamically to save power?
I was wondering if this is possible and if it is done in current designs. Seemed like an interesting enough idea to me. Here's a little diagram I made to help try and explain:
So let's say I'm ...
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3answers
106 views
Cache write/read times?
I would like to devise certain rules of thumb to help solve certain computer design/architecture challenges. Hence, in memory, which operations typically take longer to execute: loads or stores?? I ...
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1answer
123 views
clarification about amdahl's law
A system is designed as a cascade of of 4 subsystems, each contributing the same amount of time to the average service time of the system. If we wish to increase the speed of the system by a factor ...
7
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2answers
516 views
Are 32-bit ALUs really just 32 1-bit ALUs in parallell?
I'm reading the high esteemed text Computer Organization where this picture is found that is supposed to represent a 32-bit ALU:
Is this technology really how it's done, just a lot of 1-bit ALUs, so ...
2
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1answer
393 views
Calculating range of two's complement
This is a computer architecture question given in our college syllabus and i was finding difficulty in solving it.
Calculate the range of a 16-bit 2's complement number system for representing both ...
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3answers
145 views
Do computers delete memory contents? [closed]
So, if the program is finished, and jobs done, do computers "physically" reset memory contents? If they don't, what are the reasons for not resetting memory contents?
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4answers
538 views
Why do computers only use 0 and 1?
Why do computers only use 0 and 1? Won't the addition of other numbers such as 2 or 3 speed up computers? Also, 2 and 3 can be used to shorten the bit-length of integers (2 and 3 can be used to end an ...
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2answers
200 views
Is primary memory buffering the only way to access I/O devices and secondary storage?
I'm not sure if this is the right stack exchange site to ask this question so sorry if it's not. If anyone can cite a good book which explains computer architecture in general (not for a specific ...
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3answers
213 views
Where is the software / hardware boundary in modern computer systems?
Computers are pogrammed in (and controlled by) software. That software is often run by other software (e.g. Java compiled into bytecode, run by a Java VM coded in machine instructions), which is in ...
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3answers
153 views
clock signals in computers and machines [closed]
Why do computers have clock signals and clock rate, while ordinary machines do not have them?
And why is clock so fundamental in CPU and mainboard?
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2answers
160 views
A Strange Computer : Cache based computer [closed]
In the Operating System class I heard from Professor that in some institute, researchers are working on cache based computer ( means the computer that don't have RAM and have a big cache ( probably 1 ...
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3answers
245 views
Memory (RAM) of computers after shut down
After computer shuts down, is it possible to retrieve data in RAM? I heard that police was able to do that... so I felt that was somehow weird..
