All Questions
9 questions
2
votes
2
answers
183
views
Does this Verilog HDL code of a decoder look strange in any way?
I am wondering if it is ok to use output instead of wire for another output in Verilog coding (using Quartus for this). Just ...
-1
votes
1
answer
6k
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Verilog code for construction of 4x16 decoder using 3x8 decoder [closed]
This is my 3x8 verilog module:
...
- 11
2
votes
2
answers
320
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Efficient single cycle huffman decoding technique with wider input data?
I have a wider input data (Byte width) running in my system, and I'm implementing a huffman decoding on this incoming data. Since, the Huffman encoded words don't have the fixed length, hence I need ...
- 193
-2
votes
2
answers
1k
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7 to 128 decoder in Verilog
I'm new to digital electronics and programming in Verilog particularly. I have programmed some basic programs like 2 to 4 decoder, and 4 to 16 decoder. But I am trying to make an image sensor and say ...
5
votes
3
answers
3k
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CRC hardware implementation
What is the difference between these two implementations as the feedback is in first implementation the last reg only but the second implementation last reg xored with the input bit, so, what is the ...
- 99
-3
votes
3
answers
288
views
verilog assign memory in a memory
I want to assign a memory 64x6 in a memory 64x6 by saying that all the 64 rows in memory_2 will be equal to all the 64 rows in memory_1, how to make that in verilog ?? knowing that it is very easy in ...
- 99
1
vote
1
answer
2k
views
Verilog output is undefined
I'm very new to Verilog, and I'm not quite sure I'm getting it. I have a 4x16 decoder module that utilizes two 3x8 modules I've included from a separate file that worked under simulation. The problem ...
- 11
0
votes
1
answer
1k
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2
votes
1
answer
1k
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DVI-D Single Link to FPGA
I'm using LatticeXP2 family FPGA. DVI-D Single link operating at 720p is connected to FPGA. I somehow need to read RGB and XY coordinates of pixels. I know I need TMDS decoder, but I'm not sure how to ...
