I have some doubts about the use of the conversions from std_logic_vector to signed/unsigned. I always use the conversion signed(...), unsigned(...), but when I try to use the conversions defined in the library numeric_std (to_signed, to unsigned), it doesn't work. Can someone explain to me why this happens? And why the conversion unsigned() and signed() works?
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Look at the package spec for numeric_std. You will find that to_signed converts to signed ... from integer. As "vermaete" says, signed is a closely related type to std_logic_vector so you don't need a conversion function there. |
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Because the Take a look at the VHDL FAQ. This is an old website from the days that newsgroups were still hot, but it still has plenty of good information about VHDL. |
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