A CPU, or Central Processing Unit, is the heart of any digital computer.
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0answers
83 views
What can cause CPU Vcore to jump up by 20% permanently without corresponding change in CPU load?
One of my servers shows strange change in its monitored parameters. Last Sunday evening one of voltage measures ( in0 which I think is Vcore) suddenly increased by 20% from ~1V to ~1.20V on average. ...
0
votes
2answers
99 views
Is the registry file made from SRAM?
I study computer engineering and I read Hennessy's book about Computer Organization where it's described how the microprocessor does pipelining and that the microproceossor has on-chip cache, as much ...
3
votes
1answer
121 views
Is there such a thing as a circuit that outputs 1 if the input is high-impedance, and 0 otherwise?
I am trying to design a circuit that outputs a logical 1 if the input is high-impedance, and a 0 otherwise.
Any idea how I might implement this? I would prefer to use off-the-shelf parts (no ...
6
votes
1answer
133 views
How does multi-core CPU implement asynchronous coordination?
I am coming from computer science background and wanting to study process calculus for use in asynchronous circuit design.
So, I am looking around the current practice on asynchronous circuits.
There ...
2
votes
2answers
102 views
External CPU design
Apologies if this is a dumb question. I don't have any training in electrical engineering, so I can't gauge for myself how ridiculous this sounds.
Would it be possible to modify a commercial CPU so ...
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votes
2answers
130 views
3
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2answers
104 views
32 bit, 4 way multiplexer
I'm relatively new to electronics and recently decided to design and build a very simple CPU as a personal project. My instruction size is 32 bits and I want to have 32 bit registers so I am going to ...
12
votes
2answers
443 views
How did handheld video games from the 70's and 80's work?
I'm curious about how the early handheld video games from the 70's and 80's worked. You know, those small games with a LCD display with "fixed elements" meaning it was hard wired for one (or a small ...
0
votes
1answer
58 views
What's the difference between delayed branch and branch prediction?
I'm studying how delayed branch works and I'm trying to distinguish delayed branch from branch prediction. What is the difference? Is delayed branch a means to facilitate a control hazard?
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votes
1answer
77 views
Is it possible to build a CPU from content-addressable memory?
Every modern programming language use objects and not C/C++ style struct/class.
In C/C++ every data member has a size, so addressing a struct member is basically a memory address + offset. But script ...
0
votes
1answer
28 views
How to calculate the address fields for a cache?
I've a homework question about 32-bit cache memories:
For a cache memory that has size 16kB (16384 byte) and blocksize 2
words, state the names and the sizes of each field of the address that
...
1
vote
2answers
70 views
What is the meaning of “Register.Rd”?
Reading Hennesy's book "Computer Organization and Design" it is mentioned "Register.Rd" and "Register.Rs" but what does it mean? The .Rd, .Rt and .Rs parts I can't understand, on page 365:
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2answers
91 views
Understanding branch prediction
On page 376 of Hennesay's book Computer Organization And Design, the following illustration is listed to illustrate branch prediction. But what do "IM" and "DM" mean? Does IM stand for instruction ...
3
votes
2answers
145 views
Implementing multiplication
I'm trying to implement multiplication in a cpu I designed. I'm trying to achieve this with some conditions. I only two general purpose registers Rx and Ry and these instructions:
Add Rx, Ry ...
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votes
3answers
136 views
Using a CPU manually [closed]
Ok, I know this may sound dumb but, here is the thing:
I recently removed a cpu, ram and hard disk from my 10-ish year old pc. At first, I did that to understand how the pc was built. Now, the next ...
3
votes
1answer
269 views
How can a CPU dynamically change its clock frequency?
My Intel CPU changes clock speed depending on the usage, but how does it decide what clock speed to run at? Is the clock speed determined by the OS software using an algorithm, or is it hardware ...
5
votes
3answers
138 views
What does it mean for a CPU to support a stack?
How can a CPU not support a stack? Doesn't any architecture that uses subroutines (I'm pretty sure that's all architectures) have to push the return address onto the stack so it can return to where it ...
-1
votes
1answer
102 views
What Happens when I use all of my CPU resources? [closed]
I've been trying to convert some video with ffmpeg and realized that this is taking ~97% of my cpu when I check with top. What ...
1
vote
2answers
305 views
Properly simulating a NAND gate? (I'm building a computer in my computer)
I am about to embark on a project, enspired by Nand2Tetris (http://www.nand2tetris.org/), to fully simulate a computer, building the entire thing up from NAND gates.
I want to simulate everything ...
2
votes
1answer
234 views
How to calculate index and tag fields lengths for a cpu cache?
I study computer engeering notes for a cache memory and I try to understand what determines the length of the index and the tag fields. The first examples is for 64 bits and the second example is for ...
0
votes
1answer
51 views
Need Help With A Component(Octal D Flip Flop)
I'm analyzing the following component:
http://www.futurlec.com/74HC/74HC574.shtml
It says that this flip-flop has a high impedance state when the output control bit is raised high. Does this allow ...
0
votes
1answer
120 views
Options for wiring TTL camera to a Linux chip?
I'm a programmer that's a little out of his element here, and not sure where to start.
I'm trying to figure out a way I can connect this TTL camera to a PCB that also has a cheap ARM or DSP CPU on ...
1
vote
4answers
229 views
What was the advantage of a 64-bit processor in the N64?
The Nintendo 64 debuted in 1996 and featured a 64-bit MIPS processor. My understanding is that PCs didn't start appearing with 64-bit CPUs until 2003. What was the advantage of using a 64-bit CPU in ...
3
votes
2answers
134 views
Difference between 2-way and 4-way caches?
I don't fully understand this picture:
If the data and instruction caches are separated, doesn't that mean that this CPU is not von Neumann model but Harvard model?
And what does it mean that one ...
4
votes
2answers
190 views
How do registers connect to CPU buses
I'm wondering what type of buffers/techniques are typically used for connecting a cpu register(flip flops?) to a cpu bus(data/address/control). Since there are many registers on a single bus, I know ...
0
votes
1answer
115 views
Understanding CPU clock signal processing
Although I have a pretty good background in math/cs, I don't have much experience with circuits and their functionality. I've browsed the internet and looked at some books on integrated circuits, but ...
0
votes
2answers
126 views
Verilog modules: estimating power consumption before physical design
What can a designer do to get an idea of how much power a various module with consume? It seems like there should exist some decent heuristics to go about doing this, else we would have to wait until ...
0
votes
1answer
74 views
Data transfer between FFs in a CPU
I was in computer organization lecture and when we wrote what the CPU does during an add instruction (like micro instructions) something got me thinking.
I didn't understand how we let one of the FFs ...
0
votes
1answer
95 views
STM32F4 OTG_FS Leakage
We have designed a system using STM32F405 CPU.
There is a problem when I give a Vbus (5V) I can see a leakage of 50mA prior from turning on the CPU meaning I did not give any supply to the CPU( ...
16
votes
3answers
1k views
Is it possible to make illegal clones of an Intel Core i7?
The reason I'm asking is that on http://alibaba.com you can find prices for the Core i7 as low as $20, minimum quantity 1. This looks like impossibly low for a genuine Intel, but then I also can't ...
1
vote
1answer
66 views
How do I troubleshoot a broken SAA3004 Remote control transmitter used in a remote control?
I'd like to troubleshoot and fix a broken remote control for a Guldmann ceiling lift that uses the SAA3004 remote control transmitter (documentation below in link). Can someone explain the tools ...
4
votes
1answer
167 views
Processor design: turning blocks on/off dynamically to save power?
I was wondering if this is possible and if it is done in current designs. Seemed like an interesting enough idea to me. Here's a little diagram I made to help try and explain:
So let's say I'm ...
11
votes
5answers
471 views
Frequency limitation for homebrew CPUs
While looking into some custom built CPUs I've noticed the frequencies at which they operate are relatively low compared to modern CPUs (in the order of several MHz). Is there an electronics ...
7
votes
2answers
160 views
What is the physical representation of the heap and the stack?
I can easily understand how .bss and the code have physical representations in the processor which has a memory bank for the instructions that a program counter can count up and the bss (block ...
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vote
3answers
130 views
Pipeline and real parallelism?
I have read several articles which say that the CPU has the ALU (and other small specific execution units), Control Unit and the Registers and well other buffers/pipelines, internal buses etc.
The ...
2
votes
2answers
559 views
What's the difference between a microprocessor and a CPU? [duplicate]
Possible Duplicate:
What’s the difference between a microcontroller and a microprocessor?
Please inform me of the difference, if any.
7
votes
6answers
540 views
How does program execution happen in firmware?
I have heard from people working in firmware domain, that there is no Operating system controlling firmware (eg firmware in a USB drive). There is just a single thread running in a while loop waiting ...
4
votes
1answer
243 views
Difference between superscalar and multi-core?
I can´t seem to grasp this, what is the difference between superscalar and a multi-core processor?
I keep mixing them up, so some simple points on what they do would be great.
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votes
0answers
56 views
Is it possible to replace processor on a PS2? [closed]
I don't know if this is a question for this site. But I can't find any better Q&A site for this question so I will do that the faq on Area 51 says: I ask it anyway.
I want to replace the ...
4
votes
5answers
925 views
Does the size of the data bus control the maximum value the CPU can process?
I know the data bus size defines the size of the processor, but can the processor actually process data above that limit?
Would really appreciate some explanation on this.
7
votes
2answers
574 views
Are 32-bit ALUs really just 32 1-bit ALUs in parallell?
I'm reading the high esteemed text Computer Organization where this picture is found that is supposed to represent a 32-bit ALU:
Is this technology really how it's done, just a lot of 1-bit ALUs, so ...
12
votes
1answer
212 views
Soft-CPU verification
I'm currently in the process of designing a simple CPU in VHDL using Xilinx ISE and ISIM. The design portion is going remarkably well, but I can't seem to figure out a way to do verification in a ...
5
votes
2answers
228 views
How Modern Overclocking Works
Forgive me if I misunderstand some basic EE principles -- I'm a CS guy. After some googling, nobody really explains how the chip runs faster. I understand voltage must increase per this related ...
2
votes
2answers
359 views
CU or ALU? What communicates with memory?
I have different books saying different things. Are the address bus and data bus connected to the CU or the ALU? The control bus connects to the CU right?
3
votes
1answer
161 views
Custom-CPU builder/simulator
I googled deeply but couldn't find any cpu constructor simulator.
I'm specifically hoping to learn about the operation of the northbridge, but When I googled "bridge simulator" or "bridge (the ...
0
votes
1answer
270 views
graphical circuit simulator like logisim
I wanted to make a CPU and then somehow measure its efficiency/ speed. Logisim is a little buggy, and I don't think it allows you to do any sort of testing/ measurement. Does a tool like this exist?
2
votes
2answers
220 views
Is primary memory buffering the only way to access I/O devices and secondary storage?
I'm not sure if this is the right stack exchange site to ask this question so sorry if it's not. If anyone can cite a good book which explains computer architecture in general (not for a specific ...
5
votes
1answer
212 views
One-clock increment operation in a three-bus CPU architecture
In his chapter on CPU design, Edward Bosworth introduces the following three-bus architecture:
One of the main design aims of this circuit is to be able to increment the program counter PC in a ...
4
votes
1answer
171 views
What kind of building blocks are most transistors in current generation CPU's dedicated to?
When you look at the newest consumer AMD and Intel chips with billions of transistors, what the (Pareto) breakdown of building blocks used? Or asking in another way, if you zoomed into a modern CPU ...
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2answers
164 views
A Strange Computer : Cache based computer [closed]
In the Operating System class I heard from Professor that in some institute, researchers are working on cache based computer ( means the computer that don't have RAM and have a big cache ( probably 1 ...
