A CPU, or Central Processing Unit, is the heart of any digital computer.
1
vote
1answer
54 views
Combining CPU and RAM on stacked silicon
Xilinx developed a way to combine multiple dies in a single package by using a silicon interposer (I don't know whether they're actually are the first ones to do this). This way, they achieve huge ...
-2
votes
2answers
63 views
How many electrons does it take to switch on a transistor [on hold]
How many electrons does it take to switch on a transistor, I read somewhere that Inel had made some electrical "paths" so small that they can allow only individual electrons to flow at a time, or ...
0
votes
0answers
74 views
What's the cheapest and/or smallest easily-accessible/prototypeable microcontroller which can run Linux/ucLinux/BSD/etc? [closed]
Prototype-friendly development/educational boards like the Arduino have made the now-ubiquitous microcontroller accessible to just about everyone. Indeed, Atmel and Microchip's offerings frequently ...
1
vote
1answer
51 views
CISC, microcode execution flow
Say we have 16 bit processor and such CISC instruction:
0001 0010 0100 1000
As far as I understood from the answer on related question
In the process of decoding, this CISC instruction will be ...
1
vote
1answer
87 views
ARM9 vs ARM11 performance? [closed]
This may be a loaded question, but is there a general understanding of the performance increase per clock between ARM9 and ARM11? Say, for a math-heavy function (FFT)?
Thanks!
4
votes
2answers
46 views
Xbee not responding timely. Large delay between each transmission
I have prepared a setup for 2 Xbees one connected to the PC via XCTU and the other interfaced with Atmega 168. The terminal software will send 1 and the xbee with Atmega 168 will return 1.
The code ...
-1
votes
2answers
68 views
What happens when the same interrupt is caused during an ISR? [closed]
To handle an interrupt the processor jumps to an interrupt service routine (ISR). If this ISR generates the same interrupt then this can result in:
a) program error
b) hardware error
c) stack ...
1
vote
1answer
93 views
What is the fastest logic gate?
I have been told that the fastest logic gate family is ECL.
My first question: Is this true?
In this or another family (Depending on the answer to the above question),
Is there any particular gate ...
0
votes
1answer
52 views
What is the Global Descriptor Table memory type?
What type of memory type is used for the Global Descriptor Table in an Intel Core 2 CPU?
Is it just EEPROM or does the CPU normally use another type of NVRAM?
3
votes
2answers
87 views
How interrupts handle does work on a physical layer
I want to understand how HW IRQ does work on a physical layer. I ask my question considering a specific example. As known after a packet coming to a network adapter a hardware interrupt is signalling. ...
2
votes
1answer
138 views
Why does capacitor charge slowly but discharge quickly?
I've designed this circuit using Multism 10.1 :
This circuit is part of clock generator for 8088 uP:
Why does the wave of ch1 of Oscilloscope which represent the voltage across the capacitor take ...
4
votes
2answers
150 views
What is the function of the capacitor and the diode here?
This photo:
is taken from the book:
The Intel Microprocessor Family: Hardware and Software Principles and Applications,
page 298.
This is a 8284 (clock generator) for the 8088 microprocessor.
What ...
2
votes
3answers
136 views
Why the frequency of single-core CPUs has stopped increasing? [duplicate]
I wonder why CPU vendors stopped producing CPU with frequencies above 3.0 - 3.6 Ghz and switched to using multi-core CPUs?
What was the reason behind this step? Was there a physical constraint or the ...
2
votes
1answer
113 views
Building a simple PC - looking for a CPU [closed]
I would like to build a computer. It is a child's dream that I had and now that I am at college, I finally gain the knowledge I need.
I want it to be simple. I admire the early designs of 1990's ...
0
votes
2answers
93 views
How to avoid input/output conflicts with a bus
How does a system bus work?
I don't understand how can a circuit avoid input/output issues with a bus. I included an image to better explain my thinking.
The circuit has 2 general purpose ...
0
votes
1answer
187 views
Is the speed of light the upper bound on CPU speed? [closed]
Edit: As this my first question in this site I was a bit confused how to pose the question. Because of the way I had put the question before has made it trouble to understand
What is the fastest ...
0
votes
1answer
94 views
What software to graphically design a simple schematic? [duplicate]
I need to draw a schematic similar to that shown in the figure attached in this question.
Are there softwares that allow to graphically design a schematic like that?
0
votes
0answers
81 views
Doubts in two level cache system
A computer system has an L1 cache, an L2 cache, and a main memory unity connected as shown below. The block size in L1 cache is 4 words. The block size in L2 cache is 16 words. The memory access times ...
1
vote
1answer
104 views
minimum clock cycles needed?
The instruction call Rn,sub is a two word instruction.Assuming that PC is incremented during the fetch cycle of the first word of the instruction,its resister transfer operation is
...
1
vote
2answers
138 views
Why vectored interrupts are not possible?
vectored interrupts are not possible if a cpu has single interrupt request line and single interrupt grant line while multiple interrupting devices are possible .
Is the above statement is correct ...
2
votes
5answers
140 views
How does register type modifier work on different CPU architectures?
This question is to clarify my doubt against this register storage class.
when a variable is register qualified ,compiler puts the variable in a cpu register other than RAM for ease of access. so ...
0
votes
2answers
161 views
How are registers implemented in microprocessors?
A register is a temporary storage facility within the CPU that holds data for computation purposes.
What I question is how this is structured via engineering principles within the circuity:
1.I had ...
-1
votes
1answer
114 views
Motherboard with separate circuitry for PCIe, CPU, RAM etc [closed]
I asked this question on another forum (http://www.tomshardware.com/answers/id-1812014/motherboard-separate-circuitry-pcie-cpu-ram.html) but nobody replied yet so posting it here
I am looking for an ...
2
votes
3answers
532 views
AMD/Intel CPU Yield/Failure Rate
This question is based on another question submitted here: Is it possible to make illegal clones of an Intel Core i7?
More specifically, it's based around this quote:
I've been led to believe ...
6
votes
1answer
238 views
Where does all the power consumed by a CPU go?
Where does all the power consumption of a CPU go? Does all the power drawn by the PC's CPU get transformed into heat? Or does it get transformed into part heat and part some other kind of energy?
0
votes
0answers
222 views
Any simplified diagram explanation of how CPU works? [duplicate]
I'm a high level Java developer. My major is Information Systems. However, my internship subject is in embedded systems programming by C, about which I have no idea.
Trying to study about it, I ...
0
votes
1answer
251 views
CPU Soft core on FPGA
I need advice here.
One of my mid term hobby projects is to build an instruction set emulator of popular ISAs (e.g. ARM7) on a FPGA device. A lot of people have done this before.
My requirements are ...
-3
votes
2answers
256 views
Instructing the Program Counter (PC) to increment [closed]
I am building an 8bit computer from TTL, in regards to the Program Counter, sometimes I may not want it to increment on each clock pulse, with that in mind, how would I instruct it to increment?
The ...
0
votes
0answers
155 views
What can cause CPU Vcore to jump up by 20% permanently without corresponding change in CPU load?
One of my servers shows strange change in its monitored parameters. Last Sunday evening one of voltage measures ( in0 which I think is Vcore) suddenly increased by 20% from ~1V to ~1.20V on average. ...
0
votes
2answers
167 views
Is the registry file made from SRAM?
I study computer engineering and I read Hennessy's book about Computer Organization where it's described how the microprocessor does pipelining and that the microproceossor has on-chip cache, as much ...
3
votes
1answer
160 views
Is there such a thing as a circuit that outputs 1 if the input is high-impedance, and 0 otherwise?
I am trying to design a circuit that outputs a logical 1 if the input is high-impedance, and a 0 otherwise.
Any idea how I might implement this? I would prefer to use off-the-shelf parts (no ...
6
votes
1answer
238 views
How does multi-core CPU implement asynchronous coordination?
I am coming from computer science background and wanting to study process calculus for use in asynchronous circuit design.
So, I am looking around the current practice on asynchronous circuits.
There ...
2
votes
2answers
123 views
External CPU design
Apologies if this is a dumb question. I don't have any training in electrical engineering, so I can't gauge for myself how ridiculous this sounds.
Would it be possible to modify a commercial CPU so ...
-7
votes
2answers
152 views
4
votes
2answers
281 views
32 bit, 4 way multiplexer
I'm relatively new to electronics and recently decided to design and build a very simple CPU as a personal project. My instruction size is 32 bits and I want to have 32 bit registers so I am going to ...
14
votes
2answers
619 views
How did handheld video games from the 70's and 80's work?
I'm curious about how the early handheld video games from the 70's and 80's worked. You know, those small games with a LCD display with "fixed elements" meaning it was hard wired for one (or a small ...
0
votes
1answer
84 views
What's the difference between delayed branch and branch prediction?
I'm studying how delayed branch works and I'm trying to distinguish delayed branch from branch prediction. What is the difference? Is delayed branch a means to facilitate a control hazard?
0
votes
1answer
105 views
Is it possible to build a CPU from content-addressable memory?
Every modern programming language use objects and not C/C++ style struct/class.
In C/C++ every data member has a size, so addressing a struct member is basically a memory address + offset. But script ...
0
votes
1answer
45 views
How to calculate the address fields for a cache?
I've a homework question about 32-bit cache memories:
For a cache memory that has size 16kB (16384 byte) and blocksize 2
words, state the names and the sizes of each field of the address that
...
1
vote
2answers
141 views
What is the meaning of “Register.Rd”?
Reading Hennesy's book "Computer Organization and Design" it is mentioned "Register.Rd" and "Register.Rs" but what does it mean? The .Rd, .Rt and .Rs parts I can't understand, on page 365:
0
votes
2answers
102 views
Understanding branch prediction
On page 376 of Hennesay's book Computer Organization And Design, the following illustration is listed to illustrate branch prediction. But what do "IM" and "DM" mean? Does IM stand for instruction ...
3
votes
2answers
170 views
Implementing multiplication
I'm trying to implement multiplication in a cpu I designed. I'm trying to achieve this with some conditions. I only two general purpose registers Rx and Ry and these instructions:
Add Rx, Ry ...
-6
votes
3answers
142 views
Using a CPU manually [closed]
Ok, I know this may sound dumb but, here is the thing:
I recently removed a cpu, ram and hard disk from my 10-ish year old pc. At first, I did that to understand how the pc was built. Now, the next ...
3
votes
1answer
561 views
How can a CPU dynamically change its clock frequency?
My Intel CPU changes clock speed depending on the usage, but how does it decide what clock speed to run at? Is the clock speed determined by the OS software using an algorithm, or is it hardware ...
7
votes
3answers
326 views
What does it mean for a CPU to support a stack?
How can a CPU not support a stack? Doesn't any architecture that uses subroutines (I'm pretty sure that's all architectures) have to push the return address onto the stack so it can return to where it ...
-1
votes
1answer
137 views
What Happens when I use all of my CPU resources? [closed]
I've been trying to convert some video with ffmpeg and realized that this is taking ~97% of my cpu when I check with top. What ...
2
votes
2answers
424 views
Properly simulating a NAND gate? (I'm building a computer in my computer)
I am about to embark on a project, enspired by Nand2Tetris (http://www.nand2tetris.org/), to fully simulate a computer, building the entire thing up from NAND gates.
I want to simulate everything ...
2
votes
1answer
324 views
How to calculate index and tag fields lengths for a cpu cache?
I study computer engeering notes for a cache memory and I try to understand what determines the length of the index and the tag fields. The first examples is for 64 bits and the second example is for ...
0
votes
1answer
54 views
Need Help With A Component(Octal D Flip Flop)
I'm analyzing the following component:
http://www.futurlec.com/74HC/74HC574.shtml
It says that this flip-flop has a high impedance state when the output control bit is raised high. Does this allow ...
0
votes
1answer
143 views
Options for wiring TTL camera to a Linux chip?
I'm a programmer that's a little out of his element here, and not sure where to start.
I'm trying to figure out a way I can connect this TTL camera to a PCB that also has a cheap ARM or DSP CPU on ...
