Non-recursive make script

Question

I am trying to make an easy-to-use non-recursive make script that works with several directories.

Everything is packed here.:

Directory structure

/           - root
/bin        - where executable(s) will be made
/obj        - where .o and .d files will be made
/include    - any external includes
/lib1       - library 1 plus its include files
              suppose we have four files here:
              file11.cc, file11.h
              file12.cc, file12.h
/main       - the program
              suppose we have one file here:
              main.cc
              but it includes file11.h and file12.h

Here are the makefiles:

/Makefile

MYCC        = g++

# ======================================================

CF_INCL_EXTRA   :=

CF_DEPS     = -MMD -MP
CF_INCL     = -Iinclude $(CF_INCL_EXTRA)
CF_OPTIM    =
CF_WARN     = -Wall -Wconversion -Wpedantic

CF_MISC     = -D_FILE_OFFSET_BITS=64

CF_ALL      = -std=c++11    \
            $(CF_DEPS)  \
            $(CF_INCL)  \
            $(CF_OPTIM) \
            $(CF_WARN)  \
            $(CF_MISC)

CXX     = $(MYCC) $(CF_ALL)

# ======================================================

LD_ALL      =
LL_ALL      = -lstdc++

LINK        = $(MYCC) $(LD_ALL) -o $@ $^ $(LL_ALL)

SRC     = $(wildcard *.cc)

# ======================================================

A       = bin/
O       = obj/

# ======================================================
# ======================================================
# ======================================================

SUBDIRS = lib1 main

include $(addsuffix /Makefile, $(SUBDIRS))

clean:
    rm -f \
        $(O)*.o     \
        $(O)*.d

/Makefile.sub

$(O)%.o: $(SRC_DIR)%.cc
    $(CXX) \
            -c $<       \
            -o $@

-include $(SRC:%.cc=%.d)

In each of the $(SUBDIRS), there must be a Makefile.

/lib1/Makefile

SRC_DIR := $(dir $(lastword $(MAKEFILE_LIST)))

CF_INCL_EXTRA += -I$(SRC_DIR)

include Makefile.sub

all: $(O)file11.o $(O)file12.o

/main/Makefile

SRC_DIR := $(dir $(lastword $(MAKEFILE_LIST)))

include Makefile.sub

all: $(A)main

$(A)main: $(O)main.o $(O)file11.o $(O)file12.o
    $(LINK)