aarch64
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Jun 24, 2020 - Rust
benchdnn help CLI
Just a suggestion to add a "--help" support to benchdnn.
As today benchdnn does nt seem to have a --help support, the doc being only available online on this page:
https://github.com/intel/mkl-dnn/tree/master/tests/benchdnn
the proposal is to add a minimum of "print usage" to the benchdnn CLI tool.
Environ
While the test_suite presented in #589 does work, it is still pretty simple and can be improved and enhanced.
- Add tests for gnutils and coreutils.
- Add necessary utilities so more complex programs can be compiled from sources.
- Integrate CMake, so one could write something like
make validateand the subset of test that is deemed necessary (for example everything withmint
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May 29, 2020 - C++
该项目已由国际合作团队接管, 为及时回复, 请使用英文交流.
This project has been taken over by the international cooperation team. In order to respond promptly, please use English to communicate.
实际并没有问题,就是特此表达敬意!
xargo CI is failing with a strange ICE:
thread 'rustc' panicked at 'failed to lookup `SourceFile` in new context', src/librustc_middle/ty/query/on_disk_cache.rs:456:17
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace
error: internal compiler error: unexpected panic
note: the compiler unexpect
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Jun 26, 2020 - Shell
Just like clicking on a function takes you to its definition, clicking on a struct reference like STR_4231 * pStruct = NULL; should take you to the definition of STR_4321
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Apr 22, 2020 - C#
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Feb 19, 2020 - C
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Jun 21, 2020 - JavaScript
See log output indicating missing instructions (logs are from running McSema on large x64 game binary):
E0615 16:25:29.556859 15732 Lifter.cpp:123] Missing semantics for instruction (AMD64 140b7f0c9 4 (BYTES f3 0f 52 dd) RSQRTSS_XMMss_XMMss (WRITE_OP (REG_128 XMM3)) (READ_OP (REG_128 XMM5)))
E0615 16:25:29.223357 15732 Lifter.cpp:123] Missing semantics for instruction (AMD64 140b7f7b0 3 (BYT
(This is probably a good beginner issue.)
There are a few operations that operate on integers that can be implemented manually, but could profit a lot from directly using the CPU's specially-built instruction for it.
All operations listed here have a direct counterpart in assembly.
The goal is to provide a method for these operations that make use of the special CPU instruction:
- [P
The application should warn the user. For example, if it's deploying, it shouldn't just close. It should prompt for confirmation.
Raising scalars and vectors to integer powers is very common (e.g. llvm.powi), so I think the following APIs would be very useful:
- double Sleef_ipow_u10(double x, int32_t y);
- __m128d Sleef_ipowd2_u10(__m128d x, int32_t y);
- __m256d Sleef_ipowd4_u10(__m256d x, int32_t y);
- __m512d Sleef_ipowd8_u10(__m512d x, int32_t y);
- floa
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Jun 19, 2020 - Shell
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Jun 26, 2020 - Shell
popa, popad pop 8 generals
pusha, pushad push 8 generals
Maybe need a new registers flag string?
seems "all" not an option, because call instruction and others maybe redefine the semantics of "all"
xx/yx/zx like series for cases?
And
vzeroall
vzeroupper
need a "all" kind of symbol to flag it.
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Now when oss-fuzz provides pretty code coverage, it is easy to see which parts of the code are not fuzzed properly.
Identify what can be done, and add fuzzers targeting the uncovered code.