processor-design

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Here are 19 public repositories matching this topic...

darklife / darkriscv

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opensouce RISC-V implemented from scratch in one night!

fpga riscv rtl verilog risc-v rv32i softcore processor-design rv32e

Updated Jun 19, 2020
Verilog

zslwyuan / Basic-SIMD-Processor-Verilog-Tutorial

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Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the functions. The instruction code, including the opcode, will be 18-bit.

cpu processor simd verilog alu adder instruction-set-architecture cadence-virtuoso multiplier verilog-project processor-design

Updated Oct 31, 2018
Verilog

AnkurRyder / 8085-Processor

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8-bit RISC Processor on Logisim

circuit-simulator logisim processor-design

Updated Sep 4, 2019

alirezakay / RISC-CPU

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A multi cycle RISC CPU (processor) like MIPS CPU in VHDL ( a hardware side code implementation )

processor-architecture cpu vhdl isa cpu-model instruction-set-architecture mips-processor vhdl-modules risc-processor vhdl-code cpu-architecture multi-cycle processor-design

Updated Jul 13, 2019
VHDL

lazyoracle / vhdl-processor

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An 8-bit processor in VHDL based on a simple instruction set

processor-architecture fpga processor vhdl verilog vivado hardware-designs hdl xilinx-fpga processor-simulator hardware-description-language digital-electronics altera-fpga processor-design

Updated Mar 7, 2019
VHDL

overengineer / SpecialPurposeProcessor

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FPGA implementation of a special purpose processor that performs single operation using custom ALU. You can take look at the [related blog post] (https://overengineer.github.io/SpecialPurposeProcessor) for further details.

fpga verilog processor-design

Updated Jan 3, 2019
Verilog

0xD503 / ARM-Single-Cycle-Processor

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ARM architecture single-cycle processor designed according to book "Digital design and computer architecture: ARM edition" as a practice in digital design.

processor-architecture arm embedded model-simulation processor-design

Updated Jun 27, 2019
SystemVerilog

KevinWang96 / Chip-Multi-processor-System-based-on-Cardinal-Bidirectional-Ring-Network-on-chip

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EE577b-Course-Project

verilog-hdl multiprocessor processor-design networkonchip synopsys-dc cadence-ncverilog cadence-conformal

Updated May 6, 2020
Verilog

harmim / vut-inp-project2

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Návrh počítačových systémů - Projekt 2 - Procesor s Harvardskou architekturou

processor harvard vut inp fitkit vhld processor-design

Updated Nov 5, 2017
C

Bennyaw / SimpleProcessor_Verilog

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A simple processor designed using Verilog and Altera DE1 development board.

simple modelsim verilog-hdl quartus processor-design altera-de1

Updated Apr 22, 2020
Verilog

pitankar / mips-cpu

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Verilog implementation of a subset of MIPS 32 Bit Processor Instructions, ISA design, Assembler Design and Compiler design

processor-architecture embedded-systems processor-design

Updated Nov 28, 2018
Verilog

Ajarlin / CS211-Computer-Architecture

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Computer Architecture: 01:198:211 This course covers the fundamental issues in the design of modern computer systems, including the design and implementation of key hardware components such as the processor, memory, and I/O devices, and the software/hardware interface.

c data-representation assembly-x86 digital-logic-design computer-arithmetic processor-design cache-design main-memory-design

Updated Sep 18, 2018
C

blroot / DL-UNTREF---TP-Procesador

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vhdl digital-systems processor-design

Updated Dec 10, 2018
VHDL

PaulaZa5 / 32bit-alu-and-register-file

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Verilog code for an 32-bit ALU connected to a register file.

processor-design

Updated Oct 21, 2017
Verilog

Subangkar / Computer-Architecture-CSE-306-BUET

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Simulation of Designs of Basic Computer & Processor Architecture(4-bit MIPS CPU, Floating Point Adder) in Logisim as assignments of Computer Architecture Sessional course of CSE 306 of CSE, BUET