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max10

Here are 14 public repositories matching this topic...

VladisM / MARK_II

Simple SoC in VHDL with full toolchain and custom board.

toolchain cpu fpga compiler vhdl assembler intel altera soc vbcc mark-ii max10

Updated Jun 4, 2018
VHDL

redchenjs / music_light_cube

Music Light Cube | 音樂全彩光立方（主倉庫）

audio music light neopixel qt fpga dsp esp32 bluetooth ble weixin ws2812 fft cube bt sk6812 max10 a2dp apa106

Updated Jan 4, 2022

wd5gnr / verifla

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

fpga verilog icestorm lattice ice40 icestick max10 max1000

Updated Oct 15, 2018
Verilog

wd5gnr / max1000-tutorial

Tutorial and example projects for the Arrow MAX1000 FPGA board

fpga verilog pov max10 max1000

Updated Sep 13, 2018
Verilog

redchenjs / neopixel_led_controller_max10

NeoPixel LED Controller | NeoPixel LED 控制器 | 基於MAX10 FPGA的音樂全彩光立方LED控制器

neopixel fpga controller spi led ws2812 adafruit-neopixel ws2812b led-matrix led-strip sk6812 led-cube addressable-leds ws281x max10 apa106 led-panel

Updated Jan 4, 2022
Verilog

NIOSII_EclipseCompProject

robseb / NIOSII_EclipseCompProject

Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...

c eclipse python-script intel freertos cyclone-v quartus intel-fpga max10 nios-ii arria-v arria10 intel-quartus-prime soc-fpga custom-eclipse

Updated Jun 27, 2021
C

jeferrandiz98 / Pong-FPGA

Pong game on FPGA Max 10 DE10-Lite, written in VHDL.

fpga pong vhdl vga vga-driver digital-electronics de10-lite max10

Updated Oct 14, 2021
VHDL

DECAfpga / freedom-e300

SiFive's Freedom e300 for the DECA Max10 FPGA

fpga risc-v deca others max10 e300 sifive

Updated Sep 4, 2021
Verilog

davemuscle / sigma_delta_converters

Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components

fpga adc systemverilog pwm decimation dac max10 sigma-delta-modulation comb-filter quarkus sigma-delta

Updated Apr 11, 2022
SystemVerilog

fjpolo / CourseraFPGADesignforEmbeddedSystemsSpecialization

Projects and labs from the courses dictated in https://www.coursera.org/specializations/fpga-design. Projects are sometimes simulated, and implemented in either a MAX10-Lite or an Arrow MAX1000 board.-

fpga arrow vhdl intel coursera rtl verilog altera hdl vlsi max10 max1000 max10-lite

Updated Mar 22, 2021
Verilog

FedorChervyakov / de10lite-hello-adc

ADC demo on the Terasic DE10-Lite board with MAX10 FPGA

fpga adc quartus de10-lite max10 quartus-linux

Updated Feb 7, 2021

ARIES-Embedded / riscv-on-max10

Reference designs and firmware for open-source RISC-V core implementation on MX10 and SpiderSoM

fpga riscv risc-v max10 mx10 spidersom

Updated Mar 23, 2022
C

redchenjs / clock_data_recovery_max10

Clock Data Recovery | 時鐘數據恢復

fpga clock bit recovery cdr max10

Updated Aug 9, 2020
Verilog

tiacsys / ghrd-socfpga

Golden Hardware Reference Designs (GHRD) for System On Chips in FPGA (SOCFPGA)

intel altera quartus-prime socfpga max10 ghrd

Updated Aug 24, 2021
Verilog

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