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esa-tu-darmstadt / tapasco

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Add infrastructure to debug deadlocks of the AXI connections

jahofmann
jahofmann commented Jul 30, 2020

Right now it is very easy to deadlock the whole system if a PE e.g. reads from the DDR and writes to the DDR but never deals with the result of either request. Right now such a situation is quite hard to debug. Most often this scenario happens when the DMA engine is active at the same time.

Right now I have to possible solutions:

  • Add infrastructure to the AXI ports of a PE that counts the n
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Feature Request bug good first issue

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