pulp-platform / hwpe-stream
IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
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IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
Control interface for FLL
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux