As far as I can tell, the verible-verilog-kythe-extractor tool cannot directly write its output into a file.
The issue is that it force having a potentially huge buffer in memory.
It would be nice to have the capability to output the result of the kythe extraction directly to an output file without having to rely on
Thank you for developing a great tool. I recently started to use this tool because I want to use the fixer feature. However, I realized there's no way to check diff without actually fixing my files. Could you consider adding diff feature so I can go ahead applying the changes without worries?
Input test case
Any sv file.
Describe what is wrong or missing
As far as I can tell, the
verible-verilog-kythe-extractortool cannot directly write its output into a file.The issue is that it force having a potentially huge buffer in memory.
It would be nice to have the capability to output the result of the kythe extraction directly to an output file without having to rely on