sram

Various HDL (Verilog) IP Cores

An open-source static random access memory (SRAM) compiler.

A open Sega Genesis cartridge PCB

Open hardware module for interacting with e-ink displays

X68000 RAM Expansion

A crude SRAM-based map editor for NES and SNES versions of Sim City

Open Hardware SNES Cartridge with save capability

PCMCIA SRAM card project (Sakura) - rev 2.1.2019

Very essential tool for iCE40 FPGAs SRAM bitstream programming

A PCB with SRAM, buttons, LEDs and some pmod-compatible connectors for the Lattice HX8K Breakout Board

Pre-emptive multitasking kernel for AVR architecture MCUs

This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.

A GB Cartridge Dumper

A sketch for the Arduino Mega that allows it to read and write to some older generation SRAM chips

An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop) to store each bit. The size of SRAM specs is 32kbit/4k bytes with 1.8v. A 6T SRAM pairs up with two access transistors for read, write state and cross coupled inverter to hold/regenerate the state.

Fujitsu MB85-xxxx family of FRAM I2C Memory Chips

Experimental study and analysis on the effect of aggressive voltage underscaling on the reliability of COTS FPGAs: https://ieeexplore.ieee.org/abstract/document/8574581/

The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout design is done using Cadence Virtuoso’s ADE, & the Static Noise Margin is obtained through Matlab scripts.

Experimental VJ-ish installation using Arduino Uno, VGA and SD card. Moved project to STM32 for sampling audio to control visuals

SRAM Design using OpenSource Applications

Конспект по AVR ASM

2D GPU made using Verilog

23LC1024 are 1 Mbit Serial SRAM devices. The memory is accessed via a simple SPI compatible serial bus.

Basic LED Output and UART Communication Program. Startup Functionality is Modified Using Thumb Instruction Set on ARM Cortex-M4 Core Processor. Vector Table is Relocated to SRAM. Project is Built and Debugged with ARM GCC Tools on OpenOCD Server.

Arduino library for accessing the Microchip SRAM and SNVRAM SPI memory chips

A platform containing useful peripherals implemented in Chisel that can be attached together to complete the puzzle (SoC).

SPI slave to External SRAM interface for Cmod A7

A SRAM card with 64kBytes of capacity and compatible with MM1 standard

Interface between an Arduino Mega 2600 and a SRAM 6116 / Interfaz entre un Arduino Mega 2600 y una SRAM 6116

Power management work for upstream