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@antmicro @alainmarcel @zephyrproject-rtos @SymbiFlow @chipsalliance @litex-hub @hdl @antmicro-labs
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  1. An open source replacement of the Xilinx bootgen application.

    C 60 38

  2. a cursor locator extension for urxvt 💥

    Perl 3

  3. Test suite designed to check compliance with the SystemVerilog standard.

    SystemVerilog 137 41

  4. A simple TUI util to control V4L2 camera parameters

    Python 14 2

1,551 contributions in the last year

Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Mon Wed Fri

Contribution activity

November 2021

Created 2 repositories

Created a pull request in chipsalliance/sv-tests that received 4 comments

Allow the tools to use more memory

Ref: #1839

+1 −10 4 comments
Opened 2 other pull requests in 2 repositories
SymbiFlow/symbiflow-examples 1 closed
chipsalliance/verible-linter-action 1 merged
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