optimizations

Some RISC-V instructions perform writes to 2 destinations, either 2 register or register or program counter. In cases if the source of one sub-operation matches a destination of another one, the order of result output is important. The examples are jalr and instruction operating with CSRs:

riscv-software-src/riscv-tests#258
riscv-software-src/riscv-tests#263

Your obj

Describe the bug
A false positive for embedded link

To Reproduce
Steps to reproduce the behavior:

1. Run the tool for https://www.isatales.com/blog
2. Go to pages -> issues
3. The second issue says

Label : Image link missing Alt tag.
Current : http://instagram.com/isatales

Expected behavior
This shouldn't be an issue/warning

Example metadata

{
    "metadata": {
        "attribution": "openrouteservice.org | OpenStreetMap contributors",
        "service": "matrix",
        "timestamp": 1632652598861,
        "query": {
            "locations": [
                [
                    9.70093,
                    48.477473
                ],
                [
                    9.207916,