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Popular repositories

  1. openfpga Public

    Forked from chiplicity/openfpga

    Verilog 1

  2. Forked from efabless/caravel_mpw-one

    Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

    Verilog

  3. Forked from efabless/caravel_user_project

    https://caravel-user-project.readthedocs.io

    Verilog

  4. Verilog

895 contributions in the last year

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Contribution activity

October 2022

Created a pull request in efabless/caravel_mgmt_soc_litex that received 1 comment

replace SRAM with DFFRAM

+792 −719 1 comment
Opened 10 other pull requests in 3 repositories
Reviewed 1 pull request in 1 repository
efabless/caravel 1 pull request

Created an issue in efabless/caravel_mgmt_soc_litex that received 1 comment

add pass-thru signals to mgmt core wrapper

missed propagating signals to wrapper.

1 comment

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