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Bluespec, Inc.
- Framingham, MA, USA
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ICFP2020_Bluespec_Tutorial Public
Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference
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RISCV_Piccolo_v1 Public
Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).
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RISCV_ISA_Spec_Tour Public
Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)
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Formal semantics of BSV (Bluespec SystemVerilog), given as a Haskell Program and accompanying document
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