Here are
45 public repositories
matching this topic...
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Updated
Jun 1, 2022
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Makefile
Notes on the Red Pitaya Open Source Instrument
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
100 Gbps TCP/IP stack for Vitis shells
VNx: Vitis Network Examples
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Updated
Jun 8, 2022
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Jupyter Notebook
Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware
Vitis Model Composer Examples and Tutorials
A Scalable BFS Accelerator on FPGA-HBM Platform
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Updated
Jul 30, 2021
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Scala
FPGA acceleration of arbitrary precision floating point computations.
A Scalable BFS Accelerator on FPGA-HBM Platform
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Updated
Jul 1, 2021
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Scala
Github Repo for Embedded FPGA course by Vincent Claes
A Comprehensive Dataflow Compiler for High-Level Synthesis
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Updated
May 5, 2022
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CMake
Analysis and design methodology of convolutional neural networks mapping on reconfigurable logic
Ultra96 (v1) projects for Vitis platform
Fully-automated Vivado + SDK example that tests an emulated JTAG TAP controller
Reconfigurable Systems on Chip Mini Project
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Updated
Sep 17, 2020
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VHDL
An end-to-end GCN inference accelerator written in HLS
Xilinx Vitis AI with custom models
Vince's Vitis workspace for RSDecoder. Platform, system, and application for the RSDecoder hardware
T4 P3.2 - Procesador de vectores implementado en ZYBO
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Updated
Apr 22, 2022
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VHDL
Notes on the Eclypse Z7 development board
System based on hardware (FPGA) and software to implement MD5 Cryptographic Hash Function
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Updated
Jul 20, 2020
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VHDL
Ultra96-V2 Vitis Platform for Xilinx Design Tools version 2020.1
Tarea 4 Parte 3.1 IPD432 - Procesador de vectores para Nexys4 DDR
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Updated
Apr 22, 2022
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VHDL
High level synthesis projects and practices
Ultra96 (v2) projects for Vitis platform
Vitis High Level Synthesis Introduction
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