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quartus-prime

Here are 69 public repositories matching this topic...

CTSRD-CHERI / quartus-install

Install Intel FPGA 'Quartus Prime' software on remote servers

fpga quartus-prime quartus

Updated Jul 15, 2022
Python

HPS2FPGAmapping

robseb / HPS2FPGAmapping

SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)

linux fpga python-script intel bootloader altera can-bus fpga-soc embedded-linux quartus-prime intel-fpga altera-fpga hps fpga-configuration soc-fpga fpga-fabric mapping-hps-peripherals rsyocto

Updated Jun 9, 2021
Verilog

arthurmteodoro / install-quartus-linux

Tutorial de instalação do Quartus Prime no Linux

fpga install-script modelsim quartus-prime quartus-linux fpga-linux

Updated Oct 16, 2019
Shell

RomeoMe5 / DDLM

Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

Updated Apr 26, 2022
Verilog

MinatsuT / CYC1000_SDRAM

A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)

fpga quartus-prime nios2 sdram sdram-controller cyclone-10lp cyc1000

Updated Jul 8, 2021
Verilog

fpga-defender

w3arycod3r / fpga-defender

A recreation of Williams Defender 1981 arcade game for DE10-Lite FPGA dev board, written in VHDL.

fpga vhdl defender quartus-prime de10-lite

Updated May 12, 2022
VHDL

egk696 / EDAC_SDRAM_Controller

Mitigating Single-Event Upsets in COTS SDRAM using an EDAC SDRAM Controller

fpga vhdl embedded-systems vivado fault-tolerant quartus-prime sdram sdram-controller cots-sdram

Updated Oct 30, 2017
Verilog

pandyah5 / ECE241_Verilog

This repo contains all the Verilog HDL files that I made during the course.

verilog logisim verilog-hdl quartus-prime

Updated Jan 25, 2021
Verilog

addisonElliott / LogiFindFPGATest

This is a Quartus Prime FPGA project testing the functionality of the LogiFind Altera Cyclone IV EP4CE6E22C8N Development Board. This product can also be found on eBay where I bought it from. I hope to provide base code that will help others in their learning with this development board.

fpga verilog altera buzzer uart-verilog verilog-hdl 7-segment ir-receiver quartus-prime logifind nec-verilog cyclone-iv ep4ce6e22c8n pl2303 easyfpga

Updated Sep 10, 2019
Verilog

socfpgaPlatformGenerator

robseb / socfpgaPlatformGenerator

Script to build the bootloader (u-boot) and bring all components to a bootable image for Intel (ALTERA) SoC-FPGAs

build-automation linux-distribution u-boot quartus-prime cyclone-v sd-card-image intel-fpga arria10 soc-fpgas soc-eds

Updated Oct 27, 2021
Python

Paebbels / pyIPCMI

A Python-based IP Core Management Infrastructure.

infrastructure database simulation vhdl intel python3 xilinx synthesis altera modelsim questasim xilinx-vivado quartus-prime vhdl-verification ip-core riviera-pro

Updated Apr 29, 2021
Python

arnav-gudibande / fpga-intro-guide

Introductory guide to building and programming FPGAs

fpga hdl modelsim quartus-prime quartus fpga-development

Updated Aug 3, 2017
Tcl

Jefferson-Lopes / quartus-installation

Full tutorial about how to install Quartus Prime software in different systems

ubuntu installation quartus-prime quartus-linux

Updated Apr 8, 2021

samdejong86 / Cyclone-V-ADC-UART

Sends data from an ADC to a UART-USB interface

fpga serial pyserial verilog uart daq quartus-prime finite-impulse-response cyclone-v signaltap cyclone-v-gx-starter-kit data-conversion-card

Updated Feb 25, 2022
VHDL

MinatsuT / VidorGdev

Game development library for MKR VIDOR 4000

fpga verilog quartus-prime cyclone-10lp mkrvidor4000 arduino-fpga

Updated May 12, 2019
C

osafune / peridot_peripherals

PERIDOT Standard peripherals

qsys quartus-prime peridot platform-designer

Updated May 18, 2022
C

RomeoMe5 / SystemGenerator-FPGA-Marsohod.org-schoolMIPS

CAD for automatically configuring FPGA "Marsohod"

python fpga verilog hse system-verilog quartus-prime quartus miem system-generator

Updated Mar 8, 2022
Verilog

ngiambla / qvmi

Quick Verilog Module Isolator - Isolates a design for testing.

fpga regex cpp11 verilog vivado hdl verilog-hdl xilinx-fpga quartus-prime high-level-synthesis dut vivado-hls isolator isolated-modules intel-quartus

Updated Dec 11, 2018
Verilog

SamanKhamesian / Special-Purpose-Processor

This project is an implementation of a special-purpose processor that can calculate greatest common multiple (GCM) and least common factor (LCM) for two inputs based on input operation code (Opcode)

fpga state-machine controller processor vhdl gcm lcm quartus-prime de2-115

Updated Jul 18, 2019
Verilog

yuravg / quartus_cadence_netlist_merger

Quartus pin and Cadence Allegro net-list merger

python cadence quartus-prime quartus

Updated Dec 3, 2020
Python

jagumiel / irReceiver

Remote control infrared signal receiver programmed in VHDL for a Terasic DE1-SoC board.

vhdl ir-receiver quartus-prime ir-decoder vhdl-code infrared-decoder

Updated Mar 29, 2022
VHDL

Logician724 / digital_timer

A Quartus prime project that implements a 0 to 99 counter on 7 segment display using Altera DE10-Lite board

verilog quartus-prime

Updated Feb 11, 2018
Verilog

pa-tiq / vending_machine

fpga verilog quartus-prime quartus de10nano de10-lite de10-nano verilog-project quartus-18-1

Updated Jul 14, 2019
Verilog

montao / nios2-mmu

Sponsor

Design MMU for socfpga-linux 4.11. Test with Altera DE2-115.

altera hardware-designs mmu quartus-prime nios2

Updated Apr 13, 2017
Verilog

Nathen-Smith / FPGA_super_mario_bros

FPGA SOC Mario NES in SystemVerilog. Built on a DE-10 Lite FPGA, synthesized in Quartus Prime 18.1

systemverilog fpga-soc quartus-prime nios2

Updated Dec 16, 2021
Verilog

RomeoMe5 / Hummingbird-FPGA-De1-SoC

FPGA Cripto Algorithm Hummingbird

cryptography hummingbird de1-soc quartus-prime quartus terasic hummingbird-algorithm ultra-lightweight-cryptography

Updated May 30, 2020
HTML

yuravg / eda-scripts

Collection of scripts for EDA tools

fpga questasim quartus-prime quartus

Updated Jul 11, 2022
Shell

ywassef / HydraProcessor

C- minus compiler for the Hydra microprocessor architecture

fpga verilog altera quartus-prime fpga-board verilog-project

Updated Aug 17, 2018
Verilog

yuravg / system_console

Tcl packages for Quartus Prime System Console(FPGA debugging).

fpga quartus-prime quartus system-console

Updated Apr 29, 2022
Tcl

iancraz / EV21-Processor

EV21 RISC Processor Design

processor-architecture processor risc quartus-prime cyclone-iv

Updated Jul 8, 2021
Verilog

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