#

cpu-model

Here are 30 public repositories matching this topic...

pytorch / cpuinfo

CPU INFOrmation library (x86/x86-64/ARM/ARM64, Linux/Windows/Android/macOS/iOS)

cpu cpuid cpu-cache cpu-model instruction-set cpu-topology

Updated Jul 25, 2022
C

mipt-mips

MIPT-ILab / mipt-mips

Open

Adopt Clang-Format

pavelkryukov commented Feb 13, 2022

Clang-Format is a tool to format code automatically according to some guidelines.

Your objectives are:

define .clang-format file for our project, reflecting our guidelines
apply the guidelines automatically to our flow
implement a [Git hook](https://git-scm

Read more

infrastructure 4 good first issue S1 — Infrastructure

Open

Verify correctness of read-after-write behavior

Open

Implement RV64 bit manipulation instructions on 32-bit registers

Find more good first issues

wkoszek / cpu60

Example of CPU simulation in software

education simulator cpu cpu-model

Updated Nov 3, 2015
C

sake92 / nand2tetris

Nand2Tetris course solutions

tutorial scala compiler assembly nand2tetris cpu-model

Updated May 25, 2017
Scala

education-script-projects / PyCPU

Central Processing Unit Information Gathering Tool

security cpu system-information cpuid cpu-info vulnerability-detection cpu-model security-tools cpuinfo linux-system system-info cpu-vulnerability cpu-script cpu-vulnerability-check cpu-vulnerability-checker cpu-security intel-cpu amd-cpu intel-cpu-info amd-cpu-info

Updated Jan 26, 2020
Python

alirezakay / RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

processor-architecture cpu vhdl isa cpu-model instruction-set-architecture mips-processor vhdl-modules risc-processor vhdl-code cpu-architecture multi-cycle processor-design

Updated Jun 19, 2021
VHDL

pobu-arch / pumpkin

computer-architecture cpu-model microarchitecture verilog-project

Updated Jul 22, 2019
Verilog

zpekic / MicroCodeCompiler

https://hackaday.io/project/172073-microcoding-for-fpgas

visual-studio csh fpga csharp stack mapper vhdl visual-studio-code vs2017 microcode csharp-code cpu-model microcode-updates microcode-memory instruction-register machine-cycle

Updated Apr 6, 2022
VHDL

evanlissoos / OISC

One Instruction Set Computer

simulation cpu-model cpu-emulator microarchitecture killmeplz

Updated Aug 18, 2017
Python

wyvernSemi / riscV

Open source ISS and logic RISC-V 32 bit project

linux c-plus-plus fpga processor iss embedded-systems verilog cpu-model risc-v soft-core 32-bit risc-processor co-simulation

Updated Apr 22, 2022
C++

wyvernSemi / mico32

LatticeMico32 instruction set simulator project

linux c-plus-plus embedded fpga processor gdb iss python3 tcp-socket debug tkinter risc cpu-model 32-bits soft-core serial-communication latticemico32 com0com

Updated Nov 30, 2021
C++

vrobot / cpu-design

8 bit cpu I designed on logisim

logisim cpu-model 8-bit

Updated Aug 1, 2018

wyvernSemi / cpu8051

Intel(R) 8051 Instruction Set Simulator

c embedded processor iss cpu-model 8051

Updated Apr 18, 2020
Assembly

leepoly / chisel-pobu-cache

chisel3 computer-architecture cpu-model microarchitecture

Updated Nov 21, 2018
Verilog

wyvernSemi / cpu6502

A 6502 Instruction Set Simulator

c windows linux processor iss cpu-model 8-bit 6502

Updated Sep 4, 2017
C++

morris821028 / hw-radiosity

CPU-based Radiosity: Final Team Project., testing - optimization & parallel skill

webgl computer-graphics parallel-computing cpu-model radiosity

Updated Jan 18, 2017
C++

Sh-Zh-7 / tiny-CPU

Tiny series: A handwritten CPU of MIPS instruction set.

cpu-model mips-architecture computer-organization tiny-series

Updated Mar 27, 2020
Verilog

wyvernSemi / sparc

Sparc version 8 Instruction Set Simulator

c-plus-plus simulator v8 processor iss sparc cpu-model 32-bits

Updated Oct 18, 2016
Assembly

Steve-Teal / pumpkin-cpu

A small general purpose, scalable, 16-bit, 16 instruction CPU core written in VHDL

cpu cpu-cores cpu-model instruction-set vhdl-code

Updated Nov 8, 2020
C

Ismael-K / VHDL

testing vhdl embedded-systems computer computer-engineering software-engineering software-development datapath computer-architecture testbench cpu-model mips-architecture

Updated Jun 1, 2018
C

HA4ever37 / 8-Bit-CPU-EEPROM-Programmer

This is a an Arduino code to program a breadboard 8-Bit CPU based on Ben Easter CPU design

arduino asm breadboard eeprom cpu-model 8bit electrical-engineering logic-circuit 7400

Updated Jul 2, 2022
C++

cyring / topology

linux kernel-module driver cpu-model cpu-topology

Updated Sep 2, 2017
C

4x7y / Mini-CPU

fpga verilog cpu-model

Updated Oct 27, 2016
Verilog

nasherm / cpu-sim

A CPU simulator written in Rust.

rust computer computer-architecture cpu-model

Updated Jul 24, 2020
Rust

reedv / Simple-MIPS-CPU

A simple pipelined MIPS CPU implemented in verilog. Can perform add, addi, beq, j, lw, and sw instructions.

verilog cpu-model

Updated Aug 28, 2016
Verilog

raffy-bekhit / 16-bit-CPU-Simulator

A program that simulates how a 16-bit CPU works

c simulation cpu-model computer-organization

Updated Feb 18, 2017
C

MIPT-ILab / PipelineFlowchartVis

MIPT-V Pipeline Flowchart Visualizer

simulator cpu pipeline mips simulation mipt cpu-cache optimizations computer-architecture cycle-accurate risc cpu-model prediction-algorithm risc-v branch-prediction computer-architecture-lesson branch-predictor clock-precise pre-silicon

Updated Jun 25, 2022
CSS

YuHu0621 / simpleMIPs

cpu-model computer-systems

Updated Apr 28, 2017
Python

jasommer / SimpleCPU

A very simple implementation of a general purpose 12 bit RISC CPU for educational purposes.

Updated May 9, 2020
VHDL

adanpartidajr / Microprocessor

Digital design of microprocessor designed and implemented within LogicWorks.

logic-gates cpu-model digital-solutions

Updated Sep 14, 2020

Improve this page

Add a description, image, and links to the cpu-model topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the cpu-model topic, visit your repo's landing page and select "manage topics."