An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
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Updated
Feb 25, 2023 - C
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
HLS-based Graph Processing Framework on FPGAs
CSV spreadsheets and other material for AI accelerator survey papers
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
Intel® Query Processing Library (Intel® QPL)
vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器
dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
Automatic virtualization of (general) accelerators.
"Optimizing Performance and Energy Efficiency in Massively Parallel Systems" PhD Dissertation repository.
GARDENIA: Graph Analytics Repository for Designing Efficient Next-generation Accelerators
A curated list of startup accelerators around the globe
A modular, automatable, tunable mapper for accelerator programming
[TECS'22] A project on the co-design of Accelerators and CNNs.
The repo for the FERMI FEL paper using model-based and model-free reinforcement learning methods to solve a particle accelerator operation problem.
Decoherence of kicked and mismatched beams due to amplitude-dependent tune shift
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