soc

🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

microcontroller embedded cpu fpga processor vhdl riscv verilog rtos soc risc-v openocd soft-core system-on-chip rv32 neorv32

Updated Jun 3, 2023
VHDL

ucb-bar / chipyard

Star

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

boom rocket rocket-chip chip-generator chisel riscv rtl peripherals soc out-of-order superscalar risc-v firesim accelerators chipyard hwacha

Updated Jun 10, 2023
C

riscv-mcu / e203_hbirdv2

Star

The Ultra-Low Power RISC-V Core

cpu fpga core riscv verilog china hummingbird nuclei soc risc-v low-power e203

Updated Mar 27, 2023
Verilog

xboot / xboot

Star

The extensible bootloader for embedded system with application engine, write once, run everywhere.

mtk lua os boot embedded-systems operating-system rockchip samsung bootloader soc freescale allwinner xboot application-engine

Updated Jun 10, 2023
C

sergeykhbr / riscv_vhdl

Star

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

debugger qt simulator cpu vhdl riscv systemc soc

Updated Jun 9, 2023
Verilog

tenzir / vast

Sponsor

Star

The open-source pipeline and storage engine for security.

security netflow pcap network-forensics incident-response actor-model bitmap-index pipelines dataops suricata siem sigma soc zeek investigation threathunting secdataops

Updated Jun 10, 2023
C++

cyb3rxp / awesome-soc

Star

A collection of sources of documentation, as well as field best practices, to build/run a SOC

architecture detection management incident-response soa cert csirt siem tip soc risk-management ttp soar sirp mitre-attack purpleteam

Updated Jun 9, 2023

TonyPhipps / SIEM

Star

SIEM Tactics, Techiques, and Procedures

Updated Jun 7, 2023

Xilinx / Vitis_Accel_Examples

Star

Vitis_Accel_Examples

zynq xilinx soc alveo fpga-programming acap vitis

Updated Jun 5, 2023
Makefile

TonyPhipps / Meerkat

Star

A collection of PowerShell modules designed for artifact gathering and reconnaisance of Windows-based endpoints.

Updated Jun 6, 2023
PowerShell

satan1a / TheRoadOfSO

Star

学习安全运营的记录 | The knowledge base of security operation

wiki cybersecurity knowledge-base soc threat-analysis security-analysis security-operations security-operation

Updated Sep 3, 2022
HTML

WangXuan95 / USTC-RVSoC

Star

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。

cpu fpga riscv rtl verilog systemverilog soc risc-v rv32i softcore

Updated Nov 26, 2022
SystemVerilog

rggen / rggen

Star

Code generation tool for configuration and status registers

asic fpga vhdl eda rtl verilog csr systemverilog soc uvm ral axi amba apb register-descriptions wishbone-bus uvm-ral-model uvm-register-model wiki-documents

Updated Jun 9, 2023
Ruby

eshlomo1 / Microsoft-Sentinel-SecOps

Star

Microsoft Sentinel SOC Operations

microsoft security azure incident-response secops threat-hunting siem hunting soc ir cloudsecurity threat-intelligence azure-sentinel microsoft-sentinel

Updated May 12, 2023
PowerShell

stnolting / neo430

Star

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

open-source microcontroller fpga processor vhdl gcc customizable msp430 soc soft-core system-on-chip msp430-gcc

Updated Nov 23, 2021
VHDL

ui-model / ui-model

Star

UI Model major repository

react library angular reuse soc ui-model no-comonent

Updated Jan 4, 2023
TypeScript

Patrowl / PatrowlHears

Star

PatrowlHears - Vulnerability Intelligence Center / Exploits

Updated Jun 2, 2023
Python

Improve this page

Add a description, image, and links to the soc topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the soc topic, visit your repo's landing page and select "manage topics."

Learn more