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170 Open 399 Closed
170 Open 399 Closed
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Issues list

Support for merging coverage results with nvc
#984 opened Jan 3, 2024 by rpatel3001
test_runner_cleanup passes entry_gate after 1ms although it is locked
#983 opened Jan 3, 2024 by mkdev-0
1 test fals: Failed to find license notice in /usr/ports/cad/py-vunit-hdl/work-py39/vunit-4.7.0/build/lib/vunit/vhdl/osvvm/AlertLogPkg.vhd
#982 opened Jan 2, 2024 by yurivict
ModelSim issues warning regarding string_ops.vhd
#981 opened Dec 19, 2023 by nselvara
GHDL fails with exit code 4294967295
#980 opened Dec 12, 2023 by hcommin
1
Provide public API for finding dependent testbench
#977 opened Nov 9, 2023 by javValverde
Feature Request: Support for adding .psl files to allow for Assertion Based Verification
#976 opened Nov 9, 2023 by vhdlp
2
Parameters for alternative wave form viewer
#970 opened Nov 3, 2023 by oscargus
VUnit GHDL docker image crash
#968 opened Nov 1, 2023 by albydnc
Add Support for Vivado Block Design in simulation
#963 opened Oct 19, 2023 by SzymonHitachi
1
Feature: axi master implementation
#960 opened Sep 28, 2023 by DavidMartinPhios
2
Question: Pass/Fail criteria checked in Python Script
#958 opened Sep 20, 2023 by bryankerr1986
3
package "tests" in Python path?
#957 opened Sep 18, 2023 by dodotronix
Data loss in AXI Slave VC
#953 opened Aug 15, 2023 by hcommin
Acceptance test failure for GHDL 3.0.0 under WSL2
#952 opened Aug 7, 2023 by halfow
Trying to parameterize a Verilog module that name is not lower-case causes error.
#944 opened Jul 12, 2023 by piotrva
1
Feature Request: Improve VHDL UART Slave verification component
#937 opened May 23, 2023 by tasgomes
Feature request: Tcl commands to restart/reload simulation and waveforms in GTKWave
#931 opened Apr 23, 2023 by 0dinD
Dependecies for Systemverilog and mixed designs
#929 opened Apr 21, 2023 by roynil
Verilator Support Simulator support Tool: Verilator
#925 opened Apr 2, 2023 by AlexLao512
4
ghdl coverage report fails when base_path of file_name isn't there yet Enhancement Tool: GHDL
#924 opened Mar 24, 2023 by schrolli
2
verilog parser error Parsing SystemVerilog
#923 opened Mar 23, 2023 by siluks-plumerai
Issue with xml report for testnames with dots Bug
#922 opened Mar 22, 2023 by davidmedinasigasi
1
Feature Request: Option for library by library compilation Enhancement
#910 opened Mar 1, 2023 by abaebae
4
Feature Request: check_equal(...) overloads for ieee.fixed_pkg.ufixed and ieee.fixed_pkg.sfixed Builtins Enhancement
#909 opened Mar 1, 2023 by creiter64
1
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