Suppose one is designing a processor-controlled switching supply. In general, how does one properly select switching frequency vs. control loop update frequency vs. feedback sampling frequency vs. feedback anti-aliasing filter corner frequency? I think control loop update frequency should match switching frequency, and that the feedback sampling frequency should be at least the switching frequency. I also think that the anti-aliasing filter should be a lowpass that cuts frequencies above half the sampling frequency (though of course doing that perfectly is impossible). Is that accurate? If not, where am I wrong? Should the sampling frequency in fact exceed the switching frequency? Should there be some digital filtering involved as well?
This is a broad question with whole books written on this subject, so it can only be dealt with briefly here. For most processor-controller power supplies, switching frequency is the control loop frequency. If you have a high switching frequency and a complicated control loop, you might only run the loop every second cycle, or some small number of cycles. Sampling the external state would be done just before each control loop iteration, at least for the important signals that are "inside" the loop, like the value it is trying to control. As for filtering, generally filtering any feedback input to a control loop is a bad idea. Put another way, you never want to hear about output changes late. It is OK to filter other input to the control loop, like the control input, because that isn't really inside the "loop" and changing it slowly doesn't cause instability. It does reduce the overal input to output bandwidth of the whole system, but sometimes it is useful to limit the control input to the frequencies that the system can realize. |
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These are my personal opinions based on the type of switching power supply I've seen you raise questions about. You should establish (in your own mind) that the switching frequency is chosen ONLY to suit the application's energy storage devices, its load requirements and the input supply voltage range that can be expected. This is the critical part of the design. Once established, you then determine what duty cycle you need to map to any given condition such as load changes and supply voltage changes.
You also need to consider how much you can tolerate as an error should the duty cycle be fixed and the power input voltage level change by (say) 5%. Ditto the load current due to load resistance changes. From this you could implement forward error correction techniques to tweak duty cycle based on your processor measuring how much your input supply voltage moves and how much your load current is changing. This does not require fast measurements and they are not at all comparable with switching speed. This is similar to mapping an engine. So far no relationship needed connecting ADC sampling, anti-aliasing and switching speed. Summarizing, you have a decent core of switching components that produce the required output voltage for a given duty cycle. Most of the elements that may affect output voltage can be forward error corrected by tweaking the duty cycle. It doesn't produce a fantastic regulator but it would work reasonably well but can drift over time. No feedback yet and no chance of instability. But the loop does need to be closed because components heat and age and the mapping of the core electrical components won't be an exact science so ask your self the question - how quickly will the output drift from the nominal given that you can forward error correct the obvious culprits? For your type of power supply I would say it doesn't drift quickly but only you can answer that. The feedback you do implement isn't far-reaching - it's not trying to accommodate supply voltage variations or radical load changes - let the forward error correction do that - let the actual feedback system only deal with drift. So, the final "nail" should be feedback based on what your average output voltage is doing and providing you have designed the switching elements correctly this "real" part of the control-loop doesn't need to have high bandwidth. |
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